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System Modelling

JD for System Modelling Group - DES Responsibilities * Develop/enhance behavioural models in SystemC. * Debug and fix the change requests/bugs. * Develop regress able self checking test suites using C/ARM assembly. Educational Qualification : Bachelor's / Master Degree in Computer Science, Electrical/Electronics Engineering . Experience: 3+ years related experience. Required Skills: Must: * Good understanding of Microprocessor, Microcontrollers, SOC architecture, bus protocols etc. * Proficiency in C++ , OOPS, STL, data structures, algorithms and programming concepts. * Experience in developing C++/systemC based models for the virtual platform of a SoC * Strong C++ development and debugging skills using popular IDEs/debuggers. Desirable: * Experience of using Keil debugger is desirable. * Windows System Programming for Networking (sockets) is desirable * Knowledge of popular embedded processors, e.g Intel, ARM, MIPS etc. * Working experience in ESL tools CoWare/Comet. * microcontroller debugging skills (Lauterbach, PLS etc). Good to have: * Experience in GUI development With C++ In A Windows Environment.[Qt/wxWidgets] will be an added advantage. * Familiarity with hardware description languages will be an added advantage. * Experience of using PERL is will be an added advantage. * Experience in Agile methodologies [SCRUM] will be an added advantage. * Experience in smartcard domain and Secure Microcontrollers will be an added advantage. Desired Profile Position Requirements: Education: B.Tech /B.E /M.Tech in Electronics /Electrical/ComputerScience with VLSI /EDA background Experience: 4+ years of experience in R&D in semiconductor industry Experienced in designing/ coding in software/EDA tools and flows Hands on in C++ (Object Oriented Concepts) and worked on Data Structures and Algorithms Working knowledge of C++ STL libraries preferred Exposure to Unix/ Linux Platforms Knowhow in digital design and a hardware description/verification language (VHDL/E or SystemVerilog or SystemC) Knowledge about Low Power Design and Power Modelling Preferably having working knowledge in Perl/ Python Understanding of UML modelling language preferred Understand requirements and build quick solutions to help designers Willing and able to dive into new things and pick them up fast Very good analytical skills required to evaluate complex situations Focus on exchange of complex technical information Good reporting and presentation skills Good understanding of internal interfaces. Good team player as teams is spread across globe Experience 4 - 8 Years Industry Type Semiconductors / Electronics Role Senior Design Engineer

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