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Principal Engineer - Post Silicon Validation

General Purpose / Objectives: The candidate will be responsible for defining the overall Post-Si validation strategy for VV team across MC D organization. He/She will provide direction for the development of ingredients such as, but not limited to, methodologies, hardware, applications, Noise patterns and Automation for Post-Si validation for MC D organization Areas of Responsibility: Technical Lead: Lead validation engineers including technical direction/ramp, training, guidance and motivation Responsible and accountable for technical decisions and results with quality Work with Concept Engineers, designers, verification and validation teams across sites to collect requirement on Post-Si validation for both IP Modules and SoC Closely work with stakeholders and drive technical alignment for the success of overall program Assist team members, to perform their duties, in the area of test development, HW/SW tools, Debug, etc., and propose methodology & technical solutions Work with management on strategic objectives and drive initiatives to meet organization goals Propose innovative methods, develop, deploy technical solutions and publish papers in industry standard conferences Stakeholders Relationship: Build a collaborative environment across different Geos (Munich, Bristol, Singapore, etc) and partner for better technical solutions Become a key technical point of contact in Bangalore and expand to influence across MC D organization with positive impact in Post-Si validation area Meet or exceed customer expectations Technical spokesperson for the organization Leadership and Influence: Create innovative solutions, promote and influence decision makers across the organization Drive initiatives to achieve quality, meet or beat schedule and efficiency Demonstrate results with technical solutions and deploy across MC D organization Escalate technical issues and risks, with appropriate data, to management to take immediate actions Interfaces: Verification and validation team in Bangalore, Munich (Verification team, Project and Program Managers, PTE team), Villach (Analog Validation), EPOS (Characterization), Bristol (Tri-Core design and verification team) Verification (IP & SoC) and Validation team across MC D organization Designers, Concept Engineers, Project Managers, and Program Managers across MC D Desired Profile Position Requirements Education: Must have a Bachelors or Masters degree in Electrical Engineering, or Computer Engineering or equivalent Position: Architect for Verification and Validation Experience: 15+ years experience in the industry with relevant experience in the area of VLSI/ASIC design, verification, validation, board design and customer support Experience in silicon validation using functional and requirement based validation methodologies Exposure to IP modules such as CAN, LIN, USB, Ethernet, etc. is a plus Familiarity with Pre-Si verification methodology, Post-Si validation concepts, test plans, post-Si validation environment, and test writing/debug Experience in Perl / Shell scripting, languages such as C, Assembly, etc. is a must Experience in using lab equipments such as Oscilloscopes, Protocol Analyzers/Exercisers, Mid-bus Probes, Logic Analyzers, JTAG based Debuggers etc. Working knowledge of UNIX, Windows and embedded operating system Candidates should have strong written and verbal communication skills Exposure to test development on system simulators and emulators is an advantage Experience in working with cross-site organizations is a must Overseeing and directing the project engineering team and managing conflicts within different groups Works with engineers and stakeholders from the requirement phase till product delivery to customers Develops technical solutions, identify risks and propose mitigation plans for individual IP verification / validation as well as overall project Reviews and provides feedback to technical team Assesses technical training needs and selects training tools for team members Develops key stakeholders relationship to leverage expertise and influences senior management for favourable decisions with supporting data Serves as focal point for the team and interface to external groups across sites on all technical communications Facilitating and making trade off decisions between quality, costs, resources, scope and time Strong discipline and attention to detail in ensuring effective and high quality validation that minimizes bug escapes to higher levels of validation Contributes to process improvements where applicable, and gaining domain expertise to be able to independently validate effectively Experience 15 - 20 Years Industry Type Semiconductors / Electronics Role R&D Executive

Other Job Information

Vacancy type:

Full Time

Contact Mode:

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Contact Name:

Mr. Sanketh R

Job Duration:

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