Engineering Manager Information

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Intel Technology India Pvt Ltd

We stand for creating better future with our amazing technology solution. At Intel, we see more inside every day. We see the potential opportunity to make the difference. At Intel, progress is measured by improving the world around. Take a look inside and you will see that it is anything but ordinary. Intel believes in doing amazing every day and lets you be a part of this magic. Intel recognizes, realizes and handsomely rewards your best Ideas. Intel gives you the chance to answer to the que... Read More

Address	Devarabisanahalli Village, Sarjapur Ring Road Bangalore Karnataka
Website	www.intel.com
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Engineering Manager

This position is responsible for managing memory compiler team which designs and implements RF/ROM/CAM compiler for System-on-chip (SOC) family of products. Responsibilities would include but not limited to: Plans, provides resources for and directs activities in engineering function to meet schedules, standards, and cost. Cultivates and reinforces appropriate group values, norms and behaviors. Identifies and analyzes problems, plans, tasks, and solutions. Provides guidance on employee development, performance, and productivity issues. Plans and schedules daily tasks, uses judgement on a variety of problems requiring deviation from standard practices. Inadequacies and erroneous decisions would cause moderate inconvenience and expense. Desired Profile You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum qualifications - Must have a BS, MS or PhD in Electrical Engineering or Computer Engineering - Minimum 4 years' experience with industry standard memory compiler development and all relevant views for the SOC memories. - Minimum 4 years' experience in memory design convergence tools including: formal equivalence verification, static timing methodology, electrical reliability and robustness analysis - Minimum 6 years' experience with transistor level operation, memory bitcell, design challenges under process variations and low power circuit techniques - Minimum 3 years management experience in similar role. Experience 6 - 8 Years Industry Type IT-Software / Software Services Role IT/Networking-Manager